Cloud RAN Platforms – Why Are Vendors Adopting Different Layer-1 Acceleration Strategies?

CSPs are showing an increasing interest in leveraging the benefits of RAN virtualization and cloud-native technologies and vendors are responding to this demand. As a result, future RAN networks are expected to evolve gradually towards Cloud RAN based solutions, which will be deployed alongside traditional, proprietary 5G networks.

In contrast to traditional RAN networks, the baseband unit of a cloud RAN base station is split into two units: a Distributed Unit (DU) and a Centralized unit (CU). Today, the vast majority of commercially deployed DU basebands run on x86 processors. However, alternatives to Intel’s x86 platform, based on ASICs, GPU and RISC-V architectures are expected to become widely available during the next three years.

Cloud RAN platforms typically use PCIe-based accelerator cards to process the compute-intensive Layer 1 workloads. There are essentially two types of accelerator architecture: look-aside and in-line:

  • Look-aside accelerators offload a small subset of the 5G Layer 1 functions, for example, forward error correction, from the host CPU to an external FPGA-based accelerator.
  • With an in-line accelerator card, all the Layer 1 data passes directly through the accelerator and is processed in real-time – a critical requirement for Layer 1 workloads. This processing is done by other processor types, for example, ARM or RISC-V based DSPs.

However, there is a marked difference in the approach of vendors towards Layer 1 acceleration, with some vendors supporting the look-aside option, some supporting the in-line option, while others plan to offer both options.

Counterpoint Research’s latest report “Cloud RAN Platforms – Why Are Vendors Adopting Different Layer 1 Acceleration Strategies?provides details of the cloud RAN platform configurations offered by various incumbent and challenger vendors and discusses the reasoning and underlying strategy behind their technology choices and partnerships.

Table of Contents

Key Cloud RAN Platforms
-JMA Wireless

This report is available to clients of Counterpoint Research’s 5G Network Infrastructure (5GNI) Service.

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Qualcomm On Track To Launch Open RAN 5G Macro Base Station Portfolio

Cloud RAN – Waiting For A Viable Business Case?

The Emerging Cloud RAN Ecosystem – Players and Solutions

Open RAN Radio Market: Product Availability Study

New Layer-1 Accelerator Cards Set To Boost Open RAN Market – Or Create More Lock-In?

The transition of the Radio Access Network (RAN) from a standalone, integrated network into a disaggregated, virtualized solution is well underway. However, all open RAN deployments to date rely on Intel’s x86-based COTS servers, with most deployments also using Intel’s proprietary FlexRAN software architecture. Recently, various silicon vendors have announced that they are developing alternatives to Intel’s x86 platform based on ASICs, GPUs as well RISC-V architectures. Several of these vendors are currently testing their new PCIe-based Layer-1 accelerator cards with CSPs and commercial versions of these products are expected to become widely available during the next three years.

This report provides an overview of the emerging open RAN PCIe-based Layer-1 accelerator card market based on new merchant silicon and highlights the opportunities and technical challenges facing the open RAN chip community as they strive to develop alternative chip solutions capable of efficiently processing real-time, latency-sensitive Layer-1 workloads.

Key Takeaway No. 1: Too much diversity?

The launch of new L1 accelerator cards from various vendors, large and small, should be welcomed by CSPs calling for diversity and will go some way to quell criticism that the open RAN market is too Intel-based. However, CSPs may now be faced with another dilemma – too much choice! They must now face the difficult challenge of testing and comparing multiple accelerator cards, inevitably involving complicated technical and commercial trade-offs.

Key Takeaway No. 2: Look-Aside or In-Line Accelerators?

At present, the choice of accelerator architecture is binary: either look-aside or inline. Both types have their advantages and drawbacks. Depending on use cases and applications, Counterpoint Research believes that operators may need to use both types of accelerators. However, only one vendor currently offers a software/silicon platform with the capability to do this.

Key Takeaway No. 3: Interoperability and Vendor Lock-In

Developing commercial-grade Layer 1 software suitable for massive MIMO networks is an expensive process requiring very specific skills and a lot of experience – but with no guarantee of commercial success. Although open RAN is designed to promote interoperability and vendor diversity, all L1 stacks are currently tied to the underlying silicon architectures and hence are not portable between hardware platforms. This introduces a new form of vendor lock-in for CSPs. Clearly, there is an urgent need for an universal software abstraction layer between the L1 stack and the various hardware platforms to enable stack portability.

The complete versions of these Key Takeaways, including the full set of  Takeaways is published in the following report, available to clients of Counterpoint Research’s 5G Network Infrastructure (5GNI) Service.

Report: New L1 Accelerator Cards Set To Boost Open RAN Market – Or Create More Lock-In?

Table of Contents

  • Snapshot
  • Key Takeaways
  • Introduction
  • PCIe-based Hardware Acceleration
    • Look Aside vs In-Line Acceleration
    • Technical Trade-Offs
  • Processor Architectures
    • Types of Processors
    • Comparison of Hardware Options
    • Intel’s Xeon with vRAN Boost
  • Layer-1 Stacks
    • Reference or Commercial Grade Stacks?
    • Open or Closed Stacks?
    • Layers 2 and 3

  • Interoperability and Standardization
    • FAPI Interface
    • Proprietary L1 Software Stacks
    • Accelerator Abstraction Layer (AAL)
    • Saankya Labs RANwiser
  • Key Players (in alphabetical order)
    • AMD Xilinx
    • Dell
    • EdgeQ
    • Intel
    • Leapfrog Semiconductor
    • Marvell
    • Nvidia
    • Picocom
    • Qualcomm
  • Viewpoint

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The Emerging Cloud RAN Ecosystem – Players and Solutions

Open RAN Radio Market: Product Availability Study

Data Center CPU Market: AMD Surpasses Intel in Share Growth

  • The global data center CPU market’s revenue declined 4.4% YoY in 2022.
  • AMD registered a 62% YoY growth in its data center CPU revenue to hold a 20% market share.
  • Intel’s data center CPU revenue dropped by 16% YoY in 2022, while its market share fell to 71%.
  • ARM-based CPUs gained traction with Ampere, Graviton (Amazon) and Yitian (Alibaba) to surpass $1 billion in revenues for the first time.

New Delhi, Beijing, Seoul, Hong Kong, London, Buenos Aires, San Diego – February 27, 2023

The global data center CPU market’s revenue registered a 4.4% YoY decline in 2022, according to the latest research from Counterpoint’s Semiconductor Service. Macroeconomic headwinds and increased energy costs impacted the sales of data center CPUs during the year. Besides, from the architecture perspective, the addition of accelerators in the servers for workloads restricted the demand for additional CPUs for servers.

Counterpoint Research Data Center Market Q4 2022

Commenting on the companies’ 2022 performance, Senior Research Analyst Akshara Bassi said, “Even though Intel is still the market leader, its market share loss points to AMD’s rising product portfolio and better performance over Intel. AMD surpassed Intel in market share growth in 2022. Intel suffered due to continued delays in the release of its next-generation product Sapphire Rapids, generationally comparable to AMD’s Milan launched in 2021.

As demonstrated by hyperscalars AWS and Alibaba, ARM-based architecture chips continue to gain steam due to the ROI offered on varied workload deployments and off-the-shelf solutions from Ampere Computing, and shipping of data center CPUs from NVIDIA in H1 2023.”

Talking from the foundry perspective, Associate Director Dale Gai said, “As evidenced by wafer demand and foundry capacity of advanced nodes from TSMC, the total wafer sales at 5/4nm rose by 85% YoY in 2022. One of the demand drivers for the increased demand of advanced nodes is data center CPUs”

Market summary for 2022

Intel remained the market leader with a 71% share, although far from the share that it commanded till 2018. Its revenue from the segment dropped 16% YoY in 2022. The market share declined primarily due to delays in next-generation products and weakness in enterprise spending due to macroeconomic conditions.

AMD came second with a 20% market share primarily driven by increased adoption of its EPYC processor Milan. AMD is becoming a dominant force in the x86-based CPU for data centers, being increasingly adopted by cloud providers and SKUs of server companies. AMD registered a 62% YoY growth in its data center portfolio in 2022.

AWS’ in-house ARM-based chip Graviton, now in its third generation, has been among the early adopters of ARM architecture in a data center. AWS has increased Graviton’s penetration in its offerings and also expanded it to support ML-based instances with in-house accelerators, representing a shift from general-purpose compute to specific workloads.

Ampere Computing started to gain more traction in 2022 with its expansion from traditional cloud providers to enterprises by having its CPU in off-the-shelf servers from OEMs.

The comprehensive and in-depth “Data Center CPU Tracker” report is available. Please contact Counterpoint Research to access the report.

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Counterpoint Technology Market Research is a global research firm specializing in products in the technology, media and telecom (TMT) industry. It services major technology and financial firms with a mix of monthly reports, customized projects, and detailed analyses of the mobile and technology markets. Its key analysts are seasoned experts in the high-tech industry.

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Akshara Bassi
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Chip Vendors Showcase Open RAN Merchant Silicon Solutions at MWC-22

All open RAN deployments to date have used COTS server hardware based on Intel’s FlexRAN architecture with or without hardware acceleration. While x86-based compute may be adequate for rural deployments with low processing requirements, it is not sufficient for urban, high-traffic deployments using mMIMO radios.

Intel’s FlexRAN architecture typically only offloads a small subset of a base station’s L1 functions – such as forward error correction – from the host processor to an external FPGA-based “look aside” accelerator.  A high number of CPU cores are therefore required to support 5G Layer 1 and other data-centric processing tasks leading to high power consumption. Latency is also an issue.

As a result, the FlexRAN architecture cannot compete with the proprietary, integrated solutions available today from the incumbent vendors. Last year, a number of vendors announced that they were developing alternative merchant chip solutions based on ASICs, GPUs and even RISC-V architectures. Several of these vendors showcased their new designs at MWC this week.

Qualcomm’s X100 Accelerator

Qualcomm is showing its X100 5G RAN accelerator card and has announced a slew of partnerships. In contrast to Intel’s FlexRAN, the X100 in an “in-line” DSP-based PCIe accelerator card that offloads all latency-sensitive L1 processing, thus reducing the number of CPU cores required.

The X100 card will initially be offered in HPE’s ProLiant DL110 Gen10 Plus carrier-grade server. Qualcomm also announced a partnership with Rakuten, whereby the X100 will be used in Rakuten’s 64T/64R mMIMO radio units and DU units, to be deployed first in Rakuten’s network in Japan and then offered as part of Rakuten’s Symphony Symware portfolio. In addition, Qualcomm announced a partnership with Mavenir, where the X100 technology will be used in its 2nd generation mMIMO radios – possibly replacing Xilinx’s FPGAs? In Japan, Qualcomm already has partnerships with NTT DoCoMo and compatriot NEC, with the X100 being used in NEC’s DU unit, presumably using HPE’s servers.

Sampling of the X100 card is planned for mid-2022 with general availability expected in Q2 2023. Commercial products are expected to become available at the end of 2023.

Marvell’s Octeon-based Solutions

Marvell is showcasing its open RAN mMIMO RU and DU reference designs based on its Octeon Fusion processor, which integrates 5G in-line acceleration and ARM Neoverse CPUs. The Octeon processor is already widely deployed in traditional, integrated base stations and supports 5G DU processing with full O-RAN compliance. Marvell’s platform incorporates a range of 5G L1 hardware accelerators that offload all L1 processing from the host server to a Marvell Network Interface Card (NIC). Interestingly, the vendor’s Octeon processors can be customized and integrated with individual customers’ proprietary IP. Marvell claims that its designs result in a 15x reduction in power per base station compared to Intel’s FlexRAN.

Marvell has partnered with Dell and its Octeon-based open RAN DU solutions will be used in the server vendor’s PowerEdge and other x86-based servers. Solutions are set for global availability in late 2022.

Xilinx and Nvidia

Like Intel, Xilinx is in the FPGA camp and the vendor is demonstrating an open RAN 64T/64R mMIMO prototype running on a Keysight Technologies DU emulator. Xilinx launched a telco accelerator card some time ago and has an open RAN 5G vRAN demo at MWC complete with its telco accelerator card plus DU/CU units running on an AMD server. Nvidia announced its AI-on-5G platform last year and is working with Mavenir, Radisys and Wind River.

RISC-V Designs

Open-source based RISC-V may be an alternative architecture to x86 and ARM-based designs. Two companies developing open RAN RISC-V-based chips are EdgeQ and Picocom. EdgeQ is currently sampling its first products while small-cell chip vendor Picocom announced its first design win with Blinq Networks.


It is becoming clear that a disruptive open RAN ecosystem needs merchant silicon solutions if it is to be able to compete against the proprietary RAN products optimised for performance, power and cost from the likes of Huawei, Ericsson and Nokia.

Although still early days, the open RAN merchant silicon market may already be developing into a two-horse race: with Qualcomm challenging industry leader Marvell. At this time, FPGA and GPU-based alternatives from Xilinx and Nvidia respectively seem to playing second fiddle, at least in terms of announcements.

Challenger Qualcomm has ambitions to become a major player in the macro base station market. A dominant small-cell chip vendor, it sees open RAN as an entry point into the main market. Unsurprisingly, Qualcomm is engaging mostly with emerging open RAN stalwarts such as Mavenir, Rakuten and vendor NEC, who itself sees open RAN as a key differentiator to increase its RAN market share globally.

Meanwhile Marvell is the undisputed leader in base station baseband processing supplying all the major mobile infrastructure vendors, with the exception of Huawei. With its Octeon processor it will be able to supply both proprietary vRAN and O-RAN applications using essentially the same processor design. At present, it looks as if it is 12 months ahead of Qualcomm in terms of product availability. Marvell claims it already has five design wins under its belt, including at least one incumbent vendor – probably Nokia or Samsung – and possibly one or two webscale clients.



RISC-V Adoption Picks Up Pace

IP design around the chipset architecture, security and cutting-edge performance improvements matching the advancements in manufacturing process and material science have been the key to semiconductor supply chain. Intel has been dominating the CPU architecture for the computing market with its x86 instruction set but integrated mostly into its own chips. However, Arm with its “pure play” licensing of its cutting-edge chipset architecture revolutionized the smartphone market, which became the fastest growing and high-scale personal computing segment in the world.

However, the semiconductor industry over the recent years has seen significant shifts, from consolidation to power acquisition moves, which has exacerbated the geopolitical tensions between key economies with semiconductors becoming the key component of the “technology cold war”. Sanctions on Huawei, NVIDIA looking to acquire Arm and China’s domestic semiconductor ambitions have warranted the need to find alternative semiconductor IP providers and reshape the global semiconductor supply chain.

RISC-V ISA is probably the candidate in the spotlight leveraging an open-source architecture. But the key question is how RISC-V is aligned in terms of capabilities, potential opportunities, and adoption rates.

In this report, we will deep-dive into the global semiconductor IP landscape and find how the introduction of RISC-V ISA can compete with tech giants such as Intel and Qualcomm, and pure play providers such as Arm and Synopsys.

To receive your free copy of the report, please get in touch  – info(at)

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RISC-V to Shake up $8.6-Billion Semiconductor IP Market

London, Hong Kong, Boston, Toronto, New Delhi, Beijing, Taipei, Seoul – September 13, 2021

IP design around the chipset architecture, security and cutting-edge performance improvements has been the key to the semiconductor supply chain. Intel has been dominating the CPU architecture for the computing market with its x86 instruction set, while Arm revolutionized the smartphone market with its cutting-edge chipset architecture.

However, both the personal computer and smartphone markets are approaching saturation, while the “pure play” semiconductor IP market is stepping into a new era. Research Analyst William Li said, “The global semiconductor IP market is nearing an inflection point as the ratio of semiconductor content within a solution is accelerating, with a need for diverse and open approach across the compute, memory, security and other architectures.

This demand is being mainly driven by the growth of advanced applications such as AI-enabled smart devices, 5G communications, High Performance Computing (HPC) and autonomous cars. The semiconductor content growth will drive product value growth in the IC design and IP licensing industry.”

Counterpoint Research RISC-V PR infographic

According to Counterpoint Research’s latest report, ‘RISC-V Adoption Picks up Pace’, the global “pure play” semiconductor IP market size will grow at a healthy 11% CAGR to $8.6 billion per year by 2025. This market is dominated today by companies such as ARM, Synopsys, Cadence and CEVA. ARM has more than a third of the market thanks to its extremely high market share in mobile devices.

RISC-V gaining significant momentum

Having said that, the rise of RISC-V cannot be ignored. Introduced in 2010, RISC-V ISA has become more reliable and promising with a series of new tape-outs from members and incremental ecosystem support. Major IC design houses in the world, such as MediaTek, Qualcomm, NXP and SiFive, have launched several solutions. In fact, RISC-V is now a rising star in the industry, largely due to its open-source advantage, better power consumption performance promise, reliable security functions and lower political risk impact yet.

Li said, “As we estimate in our research, RISC-V processors will continue to see adoption across multiple categories. But we believe that in the near to mid term, IoT remains the key sector that could see greater than 25% adoption by 2025, mainly due to its outstanding flexibility, scalability, and power consumption optimization. Other electronics categories which could see RISC-V adoption include industrial electronics, automotive and HPC.”

The “semiconductor cold war” is heating up between key economies, which allows technologies such as RISC-V to gain importance. Against this backdrop, Research Director Dale Gai cautions, “The global economic uncertainty and trade tensions between the US, China and Taiwan will accelerate localization of the semiconductor supply chain. With over 70% of RISC-V premier members coming from China, their efforts for semiconductor expansion will reinforce China’s IP library and IC design capability, shape the supply chain, scale dynamics and extend RISC-V’s footprint across different product categories. This will call for a checkpoint in future on how the RISC-V ecosystem evolves, with success conditional to the diversity of members, respective contributions and geographical influence.”


Counterpoint Technology Market Research is a global research firm specializing in products in the TMT (technology, media and telecom) industry. It services major technology and financial firms with a mix of monthly reports, customized projects and detailed analyses of the mobile and technology markets. Its key analysts are seasoned experts in the high-tech industry.

William Li

Dale Gai

Counterpoint Research

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