Open RAN Networks – Layer 1 Acceleration Strategy Will Be Key To Operator Success

  • In-line, PCIe-based accelerator cards will be essential to process latency-sensitive, Layer 1 workloads in COTS-based massive MIMO open RAN networks.
  • Accelerator card energy efficiency will be a key differentiator among vendors as could the degree of Layer 1 stack openness.

Virtually all open RAN deployments to date are based on Intel’s FlexRAN reference software architecture running on x86-based COTS servers. While this configuration is adequate for low to medium traffic scenarios, it is not sufficient for high-traffic use cases in dense urban areas involving the use of massive MIMO radios.

Solving the massive MIMO performance deficit is a major challenge delaying the transition to open RAN. This challenge must be resolved before mainstream adoption of open RAN-based massive MIMO radios can occur. However, this will require a new breed of merchant silicon solutions designed to efficiently process latency-sensitive Layer-1 baseband workloads. Last year, a number of vendors announced alternatives to Intel’s FlexRAN platform based on ASICs, GPUs as well as RISC-V architectures and several of these vendors showcased their latest products recently at MWC-23 in Barcelona (Exhibit 1).

Look Aside Versus In-line Acceleration

Open RAN COTS platforms typically use PCIe-based accelerator cards to process the compute-intensive Layer 1 workloads. There are essentially two types of architecture designs: look-aside and in-line:

  • Look-aside accelerators offload a small subset of the 5G Layer 1 functions, for example, forward error correction, from the host CPU to an external FPGA or eASIC-based accelerator. However, this offloading adds latency and degrades system performance as the compute is done offline.

An alternative to using PCIe cards is to integrate the look-aside accelerator and CPU in a SoC. This eliminates the need for a separate PCIe card. Look-aside acceleration is used by AMD and Intel, including in the latter’s vRAN Boost integrated SoC design.

  • With the in-line accelerator architecture, all the Layer 1 data passes directly through the accelerator and is processed in real-time – a critical requirement for Layer 1 workloads. This processing is done by other types of processors, for example, ARM or RISC-V based DSPs, which results in a more energy-efficient implementation and reduces the need for additional CPUs with a high number of cores. For operators, this results in significant CAPEX and OPEX savings, particularly in the case of massive MIMO base stations, the most demanding of all 5G network deployments.

In-line accelerators also offer important scalability benefits as operators can add extra accelerator cards (up to six cards in a standard telco grade server) as more L1 capacity is required. In contrast, the look-aside architecture involves adding expensive, power-hungry COTS CPUs (+FPGA/eASIC cards) to meet capacity increases. In-line acceleration is used by ARM-based chip vendors such as Qualcomm Technologies, Inc and Marvell, as well as some RISC-V start-ups.

Layer-1 Software Stack

Chip vendors typically offer Layer-1 reference software stacks, which OEMs or third-party software vendors then customize and harden. This is an intensive two- or three-year process that demands considerable technical expertise and resources, particularly for telco-grade massive MIMO networks. With 5G, there is added complexity as the Layer 1 stack needs to be very adaptive and programmable to cater for the multitude of workloads and use cases. As a result, very few chip vendors offer carrier-grade Layer 1 software. In fact, the choice of vendors with the capability to develop macro cell massive MIMO Layer 1 stacks is essentially limited to the Tier-1 incumbents plus a handful of open RAN challenger vendors.

Tier-1 incumbents are unlikely to offer the same level of openness and flexibility as the challenger vendors, and hence accelerator cards from the latter may be a more attractive option for operators looking for a higher level of network customization. For example, Qualcomm Technologies will offer a set of APIs that allow vendors to port alternative software into its Layer 1 stack – such as beamforming or channel estimation algorithms. This lowers the barriers to entry for small software vendors and enables new players to enter the market – i.e. without requiring them to develop a full commercial-grade Layer 1 stack themselves. This could result in a rapid expansion of the Layer 1 software ecosystem.

Exhibit 1: Open RAN Layer 1 Accelerator Card Options by Vendor (Macro Cells)

Energy Efficiency – A Critical Metric

Reducing OPEX costs has become a major priority for operators due to soaring energy costs plus the need to minimize their carbon footprints. As a result, energy efficiency, i.e. Gbps/Watt, will be a critical metric for operators when evaluating Layer 1 accelerator cards. However, only a few vendors have revealed power consumption data. In a recent demo, Qualcomm Technologies showed the total power consumption of its Qualcomm® X100 5G RAN Accelerator Card [1] to be just 16-18W when driving a 16-layer 64TRx massive MIMO radio configuration serving four user devices (using four layers/device). According to the vendor, the card is designed to support a throughput of 24Gbps at less than 40W peak power consumption.


The open RAN story is gaining momentum and Counterpoint Research expects this growth to accelerate during 2023 and beyond driven by the availability of new merchant silicon solutions. To succeed in the marketplace, however, these new silicon platforms will need to demonstrate the potential to compete against the latest incumbent RAN solutions – across all key technical metrics – as well as offering the same level of advanced 5G features. Clearly, energy efficiency will be a major product differentiator, which puts current x86-based look-aside designs at a disadvantage compared to the latest in-line accelerators and suggests that most operators will favour the in-line architecture approach. Ultimately, the winning vendors will be those that are best able to satisfy the key technical requirements of individual operators while at the same time offering them the flexibility to customize their networks to suit their own requirements.


[1] Qualcomm X100 5G RAN Accelerator Card is a product of Qualcomm Technologies, Inc. and/or its subsidiaries. Qualcomm is a trademark or registered trademark of Qualcomm Incorporated

Related Reports

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The Emerging Cloud RAN Ecosystem – Players and Solutions

Cloud RAN – Technology Review and Market Challenges

Open RAN Radios – Chinese Vendors Set To Dominate An Emerging Market?


Gareth has been a technology analyst for over 20 years and has compiled research reports and market share/forecast studies on a range of topics, including wireless technologies, AI & computing, automotive, smartphone hardware, sensors and semiconductors, digital broadcasting and satellite communications.

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