Insight

A Mega Wave of Capex Cycle Starts in Logic Semiconductor Industry

February 2, 2021

A bottom-up analysis on chip supply shortage and Intel’s CPU outsourcing plan from equipment and capex perspectives

Since the beginning of this year, the concern over shortage of semiconductor chips has spread across the global supply chains of the IT and automobile industries. In fact, chipmakers believe this tightness in supply will not be resolved until the completion of inventory replenishment, with H2 2021 as the best-case scenario. Key reasons responsible for this supply shortage include under-investment in wafer capacity (especially in matured nodes of logic ICs) during 2015-2019, supply chain disruptions due to COVID-19 and geopolitical uncertainties, unexpected gadget demand for work from home (WFH), and improving visibility of emerging technology products such as AI/edge and EV. However, things are expected to change for the better, with 2021 heralding a big capex cycle that will still fall short of meeting the entire demand.

Under-investment in wafer capacity

Taking a closer look at the semiconductor capital investment trends during the past few years, it becomes clear that under-investment is the root cause of demand-supply imbalance, particularly in logic (non-memory) semiconductor industry. Capex is the leading indicator of growth in the semiconductor industry. We use the capital intensity ratio as our base to measure a fab’s expansion for future business. The ratio is calculated by dividing a company’s capital expenses by its revenue generated annually (capex to sales). The lower the ratio, the lesser the likelihood of new capacity or technology being added or implemented in the near future. Specifically, we focus on the Wafer Fab Equipment (WFE) market, representing the majority of a fab’s capex in both foundry (outsourcing) and IDM (in-house) production.

Exhibit 1: Global Logic Semiconductor Fabs Capital Intensity Trend

Counterpoint Research Global Logic Semiconductor Fabs Capital Intensity Trend

Exhibit 1 describes the 15-year trend and forecast for the capital intensity for global logic IC fabs. The blue line represents the industry average, including all foundries and IDMs. The red line depicts calculations for TSMC and Samsung Foundry.

From 2015 to 2019, the capital investment cycle remained conservative across the industry. Even at TSMC, with abundant Apple orders on hand, low capex was witnessed during this period. Capital investment on 8-inch (200 mm) fabs in general was very thin, partially due to the lack of demand and concerns over oversupply risk in China. During these years of under-investment, many IDMs in Europe and Japan increased their manufacturing for advanced nodes.
During 2019-2020, the industry ratio jumped to a higher level but mainly due to TSMC’s expansion in 7-nanometer and 5-nanometer to meet the growing demand from 5G smartphones and HPCs. Some of the other firms even considered to postpone plans for new capacities.
From 2021 to 2023, leading foundries are likely to undergo a cycle of massive equipment investment. The industry-wide capital intensity ratio will exceed 20% to offer a big opportunity for global WFE vendors. TSMC, Samsung and Intel will remain the leaders in capital spending, all setting up their new lines locally as well as in the US.

Capex boost will not solve the shortage problem in matured nodes

The aggressive capital spending in the industry will not solve the supply shortage issue in the near term, especially for matured processes and products:

Considering the long lead time of fab construction and equipment installment, IDMs are still inclined to increase their outsourcing percentage to foundry partners.
Except TSMC and Samsung, most of tier-2 foundries have been registering poor earnings, low margins and high debt ratio during the past few years. From the profitability perspective, building a new fab for smaller foundries is difficult to consider for the time being.

When we summarize the capacity shares of the world’s top 10 foundries (Exhibit 2), the capex for their legacy nodes (defined by 40-nanometer and below, including the capacities in 8-inch fabs) is only allocated to select applications in 2021. For example, despite a strong 8-inch wafer demand, UMC recently announced to increase its 200 mm fab capacity only by 1-3% in 2021. The wafer supply uncertainties also emerge from the US ban on SMIC, which accounts for about 10% of the global foundry supply in matured nodes. Overall, we view the shortage as a structural issue before inventory relief builds across the supply chain by 2022.

Exhibit 2: Foundry Capacity Share in Matured Nodes (40-nanometer and below, including 8-inch), 2021

EUV spending dominates

TSMC has announced an increase in its capex in 2021 to $25 billion-$28 billion. Excluding multiple fab constructions in Taiwan, the WFE spending at TSMC is likely to exceed $20 billion during the year, with the largest share of expenditure coming from the acquisition of EUV tools (all from ASML). ASML is also finding it tough to meet demand due to optical module support constrains. In its business outlook guidance on January 20, the company put its EUV shipments in 2021 at slightly above 40 units. The backlog is expected to be close to 50 units in 2022. TSMC and Samsung are competing for ASML’s capacity allocations while Intel continues to lag in adding EUV lines for its 7-nanometer, the next generation of CPU node which will see mass production in 2023. From the equipment perspective, Intel’s new CPU products in 7-nanometer may face supply constrains at the initial stage, considering its insufficient in-house EUV tools. Based on our survey, Intel would have accumulated only 20 ASML EUV tools (including R&D) by the end of 2022, compared to TSMC’s 90 and Samsung’s 45-50 (including the production for memory). Intel has pushed out its EUV orders during the past few quarters, while on the other hand, the company maintains its in-house manufacturing plan to supply most of the volume of new CPUs. Although we do not have the information about Intel’s latest FinFET structure and parameters for 7-nanometer, in theory the gate/metal pitches are inferior to TSMC’s 3-nanometer that adopts over 20 layers of EUV. Assuming 10 layers of EUV will be used by Intel on its new CPUs at 7-nanometer, based on our calculation, Intel’s in-house EUV tools might support up to 60-70% (equivalent to 40,000-45,000 wafer per month) of its maximum planned capacity in 7-nanometer fab, excluding the risk of lower yield rates in mass production. This line of thought is justified by the comments of Intel’s new CEO on outsourcing strategies for its new products. In our view, TSMC is poised to bag 15,000-20,000 wafers per month of Intel’s CPU orders from late 2022 to 2023. Going forward, Intel will increase its capex allocations for in-house packaging technologies (Embedded Multi-die Interconnect Bridge and 3D IC) and leverage foundry sources to compete with AMD and ARM-based CPUs.

Conclusion: We are still far away from the supply glut

Compared to the last capex cycle of the logic semiconductor industry (during 2010-2012, after financial crisis), the current cycle will be longer, stronger and more concentrated in terms of select leaders’ focus on leading-edge technology expansions. Should we be worried about any excess supply at some point? Not yet. If we consider the multi-year market opportunities for AI-enabled chips (like in mobile, server and automotive industries) in need of larger die sizes, and mmWave 5G applications, the capex boom in 2021 might just be the beginning of a wave. For comprehensive and in-depth reports on this and related topics, please visit this link.